Logging to file "DIAG-SUITE.log"


Run started on Sep 19, 2024 at 15:13:55

HP 3000 simulator V3.12-5.1 Release 14 [32b data, 32b addresses, no Ethernet]

Configuring the simulation environment.



-------------------------
HP 3000 Diagnostics Suite
-------------------------



---------------------
D420A - CPU Section 1
---------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Configuring the diagnostic.

Executing the diagnostic.
Expect pause 0 if successful.

CPU paused, P: 010000 (PAUS 0)

Continuing the diagnostic.
Expect halt 6 if successful.

Programmed halt, CIR: 030366 (HALT 6), P: 010415 (LDI 2)

Verifying the SR register and continuing the diagnostic.
Expect halt 7 if successful.

Programmed halt, CIR: 030367 (HALT 7), P: 010422 (SETR)

Verifying the SR register and continuing the diagnostic.
Expect halt 10 if successful.

Programmed halt, CIR: 030370 (HALT 10), P: 010424 (LOAD DB+1)

Verifying the SR register and continuing the diagnostic.
Expect halt 11 if successful.

Programmed halt, CIR: 030371 (HALT 11), P: 010017 (LOAD DB+1)

Verifying the PB/P/PL registers and continuing the diagnostic.
Expect halt 3 if successful.

Programmed halt, CIR: 030363 (HALT 3), P: 026170 (RSW)

Setting all even SWCH register switches and continuing the diagnostic.
Expect halt 4 if successful.

Programmed halt, CIR: 030364 (HALT 4), P: 026201 (RSW)

Setting all odd SWCH register switches and continuing the diagnostic.
Expect halt 5 if successful.

Programmed halt, CIR: 030365 (HALT 5), P: 026212 (RSW)

Restoring the switch register and continuing the diagnostic.
Expect halt 15 for successful completion.

Programmed halt, CIR: 030375 (HALT 15), P: 016250 (ZERO,NOP)


----------------------
D420A1 - CPU Section 2
----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Configuring the diagnostic.

Executing the diagnostic.
Expect halt 15 for successful completion.

Programmed halt, CIR: 030375 (HALT 15), P: 010141 (LOAD DB+0)


----------------------
D420A2 - CPU Section 3
----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Configuring the diagnostic.

Executing the diagnostic.
Expect halt 15 for successful completion.

Programmed halt, CIR: 030375 (HALT 15), P: 010163 (ZERO,NOP)


----------------------
D420A3 - CPU Section 4
----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Configuring the diagnostic.

Starting the diagnostic.
Expect a PAUS instruction stop if successful.

CPU paused, P: 021376 (PAUS 12)

Verifying the CIR register and continuing with a power failure.
Expect halt 14 if successful.

Programmed halt, CIR: 030374 (HALT 14), P: 011130 (EXIT 0)

Verifying the CIR register and continuing with a power restoration.
Expect halt 15 for successful completion.

Programmed halt, CIR: 030375 (HALT 15), P: 010630 (ZERO,NOP)


----------------------
D420A4 - CPU Section 5
----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Configuring the diagnostic.

Executing the diagnostic.
Expect halt 15 for successful completion.

Programmed halt, CIR: 030375 (HALT 15), P: 010607 (ZERO,NOP)


----------------------
D420A5 - CPU Section 6
----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 3 for successful completion.

System halt 3, P: 010011 (SETR STATUS)


----------------------
D420A6 - CPU Section 7
----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 33 for successful completion.

System halt 33, P: 010011 (SETR STATUS)


----------------------
D420A7 - CPU Section 8
----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 5 for successful completion.

System halt 5, P: 010014 (PCAL 0)


----------------------
D420A8 - CPU Section 9
----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 2 for successful completion.

System halt 2, P: 010016 (PCAL 0)


-----------------------
D420A9 - CPU Section 10
-----------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 6 for successful completion.

System halt 6, P: 010052 (IXIT)


------------------------
D420A10 - CPU Section 11
------------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 9 for successful completion.

System halt 9, P: 010011 (PSEB)


------------------------
D420A11 - CPU Section 12
------------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 1 for successful completion.

System halt 1, P: 010005 (SETR STATUS)


------------------------
D420A12 - CPU Section 13
------------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 4 for successful completion.

System halt 4, P: 010010 (ADDS 0)


------------------------
D420A13 - CPU Section 14
------------------------

Loading the diagnostic.

Cold load complete, P: 001231 (LOAD P+14)

Executing the diagnostic.
Expect a system halt 4 for successful completion.

System halt 4, P: 010003 (LDI 0)


----------------------------------------------------
D431A - Extended Instruction Set Firmware Diagnostic
----------------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.
Expect halt 6 if successful.


D01 HP30012A EXTENDED-INSTRUCTION SET DIAGNOSTIC (D431.01.00)
(C)COPYRIGHT HEWLETT PACKARD COMPANY 1976.


Q01 SELECT SWREG OPTIONS

Programmed halt, CIR: 030366 (HALT 6), P: 010117 (RSW)

Configuring the switch register.
Expect halt 5 if successful.

Q02 SELECT SECTION SWREG. OPTIONS

Programmed halt, CIR: 030365 (HALT 5), P: 010165 (RSW)

Configuring the section select register.
Expect halt 7 if successful.

Q03 RESTORE SWREG OPTIONS

Programmed halt, CIR: 030367 (HALT 7), P: 010203 (RSW)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.


Q04 ENTER MAXIMUM ERROR COUNT# = 50
Q05 ENTER PASS NUMBER =1

D02   1 PASS COMPLETED

Programmed halt, CIR: 030375 (HALT 15), P: 046030 (BR P+1,I)


--------------------------------------
D441A - COBOL-II A Firmware Diagnostic
--------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.

COBOLIIA F/W DIAG. (D441A.00.00) 

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.


                                                                                
TESTING MFL OF EDIT                                                             
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
MFL OF EDIT PASSED ALL TESTS WITHOUT ERROR                                      
********************************************************************************
                                                                                
TESTING MC'N OF EDIT                                                            
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
MCN OF EDIT PASSED ALL TESTS WITHOUT ERROR                                      
********************************************************************************
                                                                                
TESTING IC AND SUFT OF EDIT                                                     
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
 IC OF EDIT PASSED ALL TESTS WITHOUT ERROR                                      
 SUFT OF EDIT PASSED ALL TESTS WITHOUT ERROR                                    
********************************************************************************
                                                                                
TESTING MA'N OF EDIT                                                            
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
 MA OF EDIT PASSED ALL TESTS WITHOUT ERROR                                      
********************************************************************************
                                                                                
TESTING  ICS AND SST0 AND SST1 OF EDIT                                          
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
 ICS OF EDIT PASSED ALL TESTS WITHOUT ERROR                                     
 SST0 OF EDIT PASSED ALL TESTS WITHOUT ERROR                                    
 SST1 OF EDIT PASSED ALL TESTS WITHOUT ERROR                                    
********************************************************************************
                                                                                
TESTING ICI OF EDIT                                                             
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
 ICI OF EDIT PASSED ALL TESTS WITHOUT ERROR                                     
 BRIS OF EDIT PASSED ALL TESTS WITHOUT ERROR                                    
********************************************************************************
TESTING MN'N OF EDIT                                                            
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
MN OF EDIT PASSED ALL TESTS WITHOUT ERROR                                       
********************************************************************************
                                                                                
TESTING SFC AND ICSI OF EDIT                                                    
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
  SFC OF EDIT PASSED ALL TESTS WITHOUT ERROR                                    
 ICSI OF EDIT PASSED ALL TESTS WITHOUT ERROR                                    
********************************************************************************
                                                                                
TESTING MNS OF EDIT                                                             
PB'DB'MODE= 0                                                                   
PB'DB'MODE= 1                                                                   
MNS OF EDIT PASSED ALL TESTS WITHOUT ERROR                                      
********************************************************************************
                                                                                
TESTING DBNZ AND SETC OF EDIT                                                   
PB'DB'MODE=           0                                                         
PB'DB'MODE=           1                                                         
 DBNZ OF EDIT PASSED ALL TESTS WITHOUT ERROR                                    
 SETC OF EDIT PASSED ALL TESTS WITHOUT ERROR                                    
********************************************************************************
                                                                                
TESTING MDWO AND SUFS OF EDIT                                                   
PB'DB'MODE= 0                                                                   
PB'DB'MODE= 1                                                                   
MDWO OF EDIT PASSED ALL TESTS WITHOUT ERROR                                     
SUFS OF EDIT PASSED ALL TESTS WITHOUT ERROR                                     
********************************************************************************
                                                                                
TESTING ICP OF EDIT                                                             
PB'DB'MODE= 0                                                                   
PB'DB'MODE= 1                                                                   
ICP OF EDIT PASSED ALL TESTS WITHOUT ERROR                                      
********************************************************************************
                                                                                
TESTING ICPS OF EDIT                                                            
PB'DB'MODE= 0                                                                   
PB'DB'MODE= 1                                                                   
ICPS OF EDIT PASSED ALL TESTS WITHOUT ERROR                                     
********************************************************************************
                                                                                
TESTING "IS" OF EDIT                                                            
PB'DB'MODE= 0                                                                   
PB'DB'MODE= 1                                                                   
"IS" OF EDIT PASSED ALL TESTS WITHOUT ERROR                                     
********************************************************************************
                                                                                
TESTING "ENDF" OF EDIT                                                          
                                                                                
TESTING "SFLC" OF EDIT                                                          
                                                                                
TESTING "DFLC" OF EDIT                                                          
                                                                                
PB'DB'MODE= 0                                                                   
PB'DB'MODE= 1                                                                   
"ENDF" OF EDIT PASSED ALL TESTS WITHOUT ERROR                                   
"SFLC" OF EDIT PASSED ALL TESTS WITHOUT ERROR                                   
"DFLC" OF EDIT PASSED ALL TESTS WITHOUT ERROR                                   
********************************************************************************
END OF PASS 0

Programmed halt, CIR: 030375 (HALT 15), P: 010330 (RSW)


--------------------------------------
D442A - COBOL-II B Firmware Diagnostic
--------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.

COBOLIIB FIRMWARE DIAGNOSTIC (D442A.00.00)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.


                                                                                
TESTING ABSD                                                                    
ABSD PASSED ALL TESTS WITHOUT ERROR                                             
                                                                                
TESTING ABSN                                                                    
ABSN PASSED ALL TESTS WITHOUT ERROR                                             
                                                                                
                                                                                
TESTING XBR                                                                     
                                                                                
XBR PASSED ALL TESTS WITHOUT ERROR                                              
                                                                                
                                                                                
TESTING NEGD                                                                    
SDEC= 0                                                                         
                                                                                
SDEC= 1                                                                         
                                                                                
NEGD PASSED ALL TESTS WITHOUT ERROR                                             
                                                                                
                                                                                
TESTING PARC AND ENDP                                                           
                                                                                
I AM IN OUTER'BLOCK OF PARC                                                     
I AM IN PAR6                                                                    
I AM IN OUTER'BLOCK OF PARC                                                     
PARC AND ENDP PASSED ALL TESTS WITHOUT ERROR                                    
                                                                                
                                                                                
                                                                                
TESTING TR                                                                      
TESTING DB TABLE ACCESS                                                         
TESTING PB TABLE ACCESS                                                         
TR PASSED ALL TESTS WITHOUT ERROR                                               
                                                                                
                                                                                
TESTING CVND                                                                    
SDEC = 0                                                                        
                                                                                
SDEC = 1                                                                        
                                                                                
CVND PASSED ALL TESTS WITHOUT ERROR                                             
                                                                                
                                                                                
                                                                                
TESTING CMPS                                                                    
TESTING DB-TARGET ACCESS                                                        
                                                                                
TESTING PB-TARGET ACCESS                                                        
                                                                                
CMPS PASSED ALL TESTS WITHOUT ERROR                                             
                                                                                
                                                                                
TESTING CMPT                                                                    
TESTING TRANSLATION TABLE IN PB                                                 
                                                                                
TESTING DB-TARGET ACCESS                                                        
                                                                                
TESTING PB-TARGET ACCESS                                                        
                                                                                
CMPT PASSED ALL TESTS WITHOUT ERRORS                                            
                                                                                
                                                                                
TESTING TCCS                                                                    
TCCS PASSED ALL TESTS WITHOUT ERROR                                             
                                                                                
                                                                                
TESTING LDW                                                                     
SDEC=0                                                                          
SDEC=1                                                                          
TESTING LDDW                                                                    
SDEC=0                                                                          
SDEC=1                                                                          
LDW AND LDWW PASSED ALL TESTS WITHOUT ERROR                                     
                                                                                
TESTING ALGN                                                                    
ALGN PASSED ALL TESTS WITHOUT ERROR                                             
                                                                                
END OF PASS 0

Programmed halt, CIR: 030375 (HALT 15), P: 010315 (RSW)


-------------------------------
D427A - Terminal Data Interface
-------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.
Expect halt 6 if successful.

Programmed halt, CIR: 030366 (HALT 6), P: 010764 (LRA P+4)

Configuring the switch register.
Expect halt 5 if successful.

Programmed halt, CIR: 030365 (HALT 5), P: 010215 (RSW)

Configuring the section select register.
Expect halt 6 if successful.

Programmed halt, CIR: 030366 (HALT 6), P: 010231 (BR P-47)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.

Programmed halt, CIR: 030375 (HALT 15), P: 010331 (BR P+7)


----------------------------------
D438A - Terminal Control Interface
----------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.
Expect halt 6 if successful.

Programmed halt, CIR: 030366 (HALT 6), P: 010670 (LRA P+4)

Configuring the switch register.
Expect halt 5 if successful.

Programmed halt, CIR: 030365 (HALT 5), P: 010073 (RSW)

Configuring the section select register.
Expect halt 6 if successful.

Programmed halt, CIR: 030366 (HALT 6), P: 010107 (BR P-47)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.

Programmed halt, CIR: 030375 (HALT 15), P: 010225 (BR P+7)


--------------------------
D421 - Memory Pattern Test
--------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.
Expect halt 16 if successful.

Programmed halt, CIR: 030376 (HALT 16), P: 015056 (RSW)

Configuring the diagnostic.

Executing the diagnostic.
Expect message "PASS # 000000" and halt 15 if successful.

HP 3000 SERIES II MEMORY PATERN TEST D421A.01.0
(C)COPYRIGHT HEWLETT PACKARD COMPANY 1976.

LOW BANK?0
LOW ADDRESS?020000
HIGH BANK?3
HIGH ADDRESS?177777
PASS # 000000

Programmed halt, CIR: 030375 (HALT 15), P: 010255 (BR P-154)


------------------------------------------
D429A - Selector Channel Maintenance Board
------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.
Expect halt 0 if successful.


D100 HP30030B/C SELECTOR CHANNEL DIAG (D429A.01.01)
(C)COPYRIGHT HEWLETT-PACKARD COMPANY 1978.
Q104 SELECT OPTIONS

Programmed halt, CIR: 030360 (HALT 0), P: 010033 (RSW)

Configuring the switch register.
Expect halt 1 if successful.

Q110 SELECT SECTION OPTIONS

Programmed halt, CIR: 030361 (HALT 1), P: 010073 (RSW)

Configuring the section select register.
Expect halt 2 if successful.

Q111 RESTORE SELECT OPTIONS

Programmed halt, CIR: 030362 (HALT 2), P: 010102 (RSW)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for a successful first pass.

Q101 SET MAINT CARD DEV NUM? 65
Q102 SET TIMER/CONSOLE DEV NUM? 3

Q108 ENTER UPPER BANK # (DECIMAL) = 7
Q105 ERR PRINT LIMIT? 999
D110 DIRECT I/O TEST
D127 DIRECT I/O TEST COMPLETED
D130 CONTROL ORDER TEST
D217 CONTROL ORDER TEST COMPLETE
D220 READ TEST
D244 2K READ 4 MILLISEC; BANK00 
D244 2K READ 4 MILLISEC; BANK01 
D244 2K READ 4 MILLISEC; BANK02 
D244 2K READ 4 MILLISEC; BANK03 
D244 2K READ 4 MILLISEC; BANK04 
D244 2K READ 4 MILLISEC; BANK05 
D244 2K READ 4 MILLISEC; BANK06 
D244 2K READ 4 MILLISEC; BANK07 
D247 READ TEST COMPLETED
D250 WRITE TEST
D274 2K WRITE 4 MILLISEC; BANK00 
D274 2K WRITE 4 MILLISEC; BANK01 
D274 2K WRITE 4 MILLISEC; BANK02 
D274 2K WRITE 4 MILLISEC; BANK03 
D274 2K WRITE 4 MILLISEC; BANK04 
D274 2K WRITE 4 MILLISEC; BANK05 
D274 2K WRITE 4 MILLISEC; BANK06 
D274 2K WRITE 4 MILLISEC; BANK07 
D275 WRITE TEST COMPLETED
D300 CHAINED READ TEST
D317 CHAINED READ TEST COMPLETED
D320 CHAINED WRITE TEST
D337 CHAINED WRITE TEST COMPLETE
D340 ERROR RESPONSE TEST
D367 ERROR RESPONSE TEST COMPLETED
D600 SELECTOR CHANNEL DIAG COMPLETE
D601 END OF PASS 1

Programmed halt, CIR: 030375 (HALT 15), P: 010427 (SED 0)

Configuring the switch register.
Expect halt 1 if successful.

D600 SELECTOR CHANNEL DIAG COMPLETE
D601 END OF PASS 2
Q110 SELECT SECTION OPTIONS

Programmed halt, CIR: 030361 (HALT 1), P: 010073 (RSW)

Configuring the section select register.
Expect halt 2 if successful.

Q111 RESTORE SELECT OPTIONS

Programmed halt, CIR: 030362 (HALT 2), P: 010102 (RSW)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.

Q101 SET MAINT CARD DEV NUM? 66
Q102 SET TIMER/CONSOLE DEV NUM? 3

Q108 ENTER UPPER BANK # (DECIMAL) = 7
Q105 ERR PRINT LIMIT? 999
D110 DIRECT I/O TEST
D127 DIRECT I/O TEST COMPLETED
D130 CONTROL ORDER TEST
D217 CONTROL ORDER TEST COMPLETE
D220 READ TEST
D244 2K READ 4 MILLISEC; BANK00 
D244 2K READ 4 MILLISEC; BANK01 
D244 2K READ 4 MILLISEC; BANK02 
D244 2K READ 4 MILLISEC; BANK03 
D244 2K READ 4 MILLISEC; BANK04 
D244 2K READ 4 MILLISEC; BANK05 
D244 2K READ 4 MILLISEC; BANK06 
D244 2K READ 4 MILLISEC; BANK07 
D247 READ TEST COMPLETED
D250 WRITE TEST
D274 2K WRITE 4 MILLISEC; BANK00 
D274 2K WRITE 4 MILLISEC; BANK01 
D274 2K WRITE 4 MILLISEC; BANK02 
D274 2K WRITE 4 MILLISEC; BANK03 
D274 2K WRITE 4 MILLISEC; BANK04 
D274 2K WRITE 4 MILLISEC; BANK05 
D274 2K WRITE 4 MILLISEC; BANK06 
D274 2K WRITE 4 MILLISEC; BANK07 
D275 WRITE TEST COMPLETED
D300 CHAINED READ TEST
D317 CHAINED READ TEST COMPLETED
D320 CHAINED WRITE TEST
D337 CHAINED WRITE TEST COMPLETE
D340 ERROR RESPONSE TEST
D367 ERROR RESPONSE TEST COMPLETED
D600 SELECTOR CHANNEL DIAG COMPLETE
D601 END OF PASS 1

Programmed halt, CIR: 030375 (HALT 15), P: 010427 (SED 0)


------------------------
D429A - Selector Channel
------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.
Expect halt 0 if successful.


D100 HP30030B/C SELECTOR CHANNEL DIAG (D429A.01.01)
(C)COPYRIGHT HEWLETT-PACKARD COMPANY 1978.
Q104 SELECT OPTIONS

Programmed halt, CIR: 030360 (HALT 0), P: 010033 (RSW)

Configuring the switch register.
Expect halt 1 if successful.

Q110 SELECT SECTION OPTIONS

Programmed halt, CIR: 030361 (HALT 1), P: 010073 (RSW)

Configuring the section select register.
Expect halt 2 if successful.

Q111 RESTORE SELECT OPTIONS

Programmed halt, CIR: 030362 (HALT 2), P: 010102 (RSW)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.

Q101 SET MAINT CARD DEV NUM? 65
Q102 SET TIMER/CONSOLE DEV NUM? 3

Q108 ENTER UPPER BANK # (DECIMAL) = 7
Q105 ERR PRINT LIMIT? 999
D110 DIRECT I/O TEST
D127 DIRECT I/O TEST COMPLETED
D130 CONTROL ORDER TEST
D217 CONTROL ORDER TEST COMPLETE
D220 READ TEST
D244 2K READ 1 MILLISEC; BANK00 
D244 2K READ 1 MILLISEC; BANK01 
D244 2K READ 1 MILLISEC; BANK02 
D244 2K READ 1 MILLISEC; BANK03 
D244 2K READ 1 MILLISEC; BANK04 
D244 2K READ 1 MILLISEC; BANK05 
D244 2K READ 1 MILLISEC; BANK06 
D244 2K READ 1 MILLISEC; BANK07 
D247 READ TEST COMPLETED
D250 WRITE TEST
D274 2K WRITE 1 MILLISEC; BANK00 
D274 2K WRITE 1 MILLISEC; BANK01 
D274 2K WRITE 1 MILLISEC; BANK02 
D274 2K WRITE 1 MILLISEC; BANK03 
D274 2K WRITE 1 MILLISEC; BANK04 
D274 2K WRITE 1 MILLISEC; BANK05 
D274 2K WRITE 1 MILLISEC; BANK06 
D274 2K WRITE 1 MILLISEC; BANK07 
D275 WRITE TEST COMPLETED
D300 CHAINED READ TEST
D317 CHAINED READ TEST COMPLETED
D320 CHAINED WRITE TEST
D337 CHAINED WRITE TEST COMPLETE
D340 ERROR RESPONSE TEST
D367 ERROR RESPONSE TEST COMPLETED
D600 SELECTOR CHANNEL DIAG COMPLETE
D601 END OF PASS 1

Programmed halt, CIR: 030375 (HALT 15), P: 010427 (SED 0)


---------------------------
D422A - Multiplexer Channel
---------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.
Expect halt 0 if successful.


DO1 30036A/B MPX CHANNEL TEST (HP D422A.01.2)
(C)COPYRIGHT HEWLETT-PACKARD COMPANY 1978.
Q01 SELECT SWITCH REGISTER OPTIONS

Programmed halt, CIR: 030360 (HALT 0), P: 042614 (RSW)

Configuring the switch register.
Expect halt 1 if successful.

Q02 SELECT SECTION OPTIONS

Programmed halt, CIR: 030361 (HALT 1), P: 042660 (LDI 1)

Configuring the section select register.
Expect halt 2 if successful.

Q03 RESTORE REGISTER OPTIONS

Programmed halt, CIR: 030362 (HALT 2), P: 042667 (RSW)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.

Q04 ENTER MPX DEVICE #= 127
Q05 ENTER MAXIMUM ERROR COUNT# = 999
P02 END SECTION IORES 
P02 END SECTION ARADDR
P02 END SECTION ARDATA
P02 END SECTION ARCPP 
P02 END SECTION ORADDR
P02 END SECTION ORDATA
P02 END SECTION ORCP  
P02 END SECTION AREG  
P02 END SECTION OREG  
P02 END SECTION NSGP1 
P02 END SECTION NSGP2 
P02 END SECTION NSGP3 
P02 END SECTION NSGP4 
P02 END SECTION STPAR 
P11 IF SEL. CHAN. MAINTENANCE BOARD ALREADY IN THEN HIT * CR*
P11 OTHERWISE INSERT BOARD,CONNECT POLLS,AND RE-COLD LOAD

Q06 ENTER SEL. CHAN. MAINTENANCE BOARD DRT# =65
Q07 ENTER 2ND SCMB DRT# = 66
Q08 ENTER CLOCK/CONSOLE DRT# = 3

Q09 ENTER UPPER BANK # (DECIMAL) = 7
P15 END SIO TEST CONFIGURATION

P16 FAST SR READ MODE(2K XFER); TIME = 4    MSEC.; BANK 00; STEP 63
P16 FAST SR READ MODE(2K XFER); TIME = 4    MSEC.; BANK 01; STEP 63
P16 FAST SR READ MODE(2K XFER); TIME = 4    MSEC.; BANK 02; STEP 63
P16 FAST SR READ MODE(2K XFER); TIME = 4    MSEC.; BANK 03; STEP 63
P16 FAST SR READ MODE(2K XFER); TIME = 4    MSEC.; BANK 04; STEP 63
P16 FAST SR READ MODE(2K XFER); TIME = 4    MSEC.; BANK 05; STEP 63
P16 FAST SR READ MODE(2K XFER); TIME = 4    MSEC.; BANK 06; STEP 63
P16 FAST SR READ MODE(2K XFER); TIME = 4    MSEC.; BANK 07; STEP 63
P17 FAST SR WRITE MODE(2K XFER); TIME=4   MSEC.; BANK 00; STEP 68
P17 FAST SR WRITE MODE(2K XFER); TIME=4   MSEC.; BANK 01; STEP 68
P17 FAST SR WRITE MODE(2K XFER); TIME=4   MSEC.; BANK 02; STEP 68
P17 FAST SR WRITE MODE(2K XFER); TIME=4   MSEC.; BANK 03; STEP 68
P17 FAST SR WRITE MODE(2K XFER); TIME=4   MSEC.; BANK 04; STEP 68
P17 FAST SR WRITE MODE(2K XFER); TIME=4   MSEC.; BANK 05; STEP 68
P17 FAST SR WRITE MODE(2K XFER); TIME=4   MSEC.; BANK 06; STEP 68
P17 FAST SR WRITE MODE(2K XFER); TIME=4   MSEC.; BANK 07; STEP 68
P02 END SECTION SIOTST
D02 END MPX CHAN TEST
D03 END: PROGRAM CYCLE: PASS = 1     

Programmed halt, CIR: 030375 (HALT 15), P: 010175 (ZERO,NOP)


--------------------------------------------
D426A - System Clock/Fault Logging Interface
--------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading the diagnostic.
Expect halt 0 if successful.

D01 HP        SYSTEM CLOCK DIAGNOSTIC  (D426A.00.00)
(C)COPYRIGHT HEWLETT-PACKARD COMPANY 1978.
Q02 SELECT SWREG OPTIONS

Programmed halt, CIR: 030360 (HALT 0), P: 010022 (RSW)

Configuring the switch register.
Expect halt 1 if successful.

Q03 SELECT SECTION SWREG. OPTIONS

Programmed halt, CIR: 030361 (HALT 1), P: 010066 (RSW)

Configuring the section select register.
Expect halt 2 if successful.

Q05 RESTORE SWREG OPTIONS

Programmed halt, CIR: 030362 (HALT 2), P: 010075 (RSW)

Reconfiguring the switch register and executing the diagnostic.
Expect halt 15 for successful completion.

P01 SECTION  1 
P03 END STEP  101
P03 END STEP  103
P03 END STEP  105
P02 END SECTION  1 

P01 SECTION  2 
P03 END STEP  202
P03 END STEP  203
P03 END STEP  204
P03 END STEP  205
P03 END STEP  206
P03 END STEP  207
P03 END STEP  210
P02 END SECTION  2 

P01 SECTION  3 
P03 END STEP  302
P03 END STEP  304
P03 END STEP  306
P03 END STEP  310
P03 END STEP  312
P03 END STEP  314
P03 END STEP  316
P02 END SECTION  3 

P01 SECTION  4 
P03 END STEP  402
P03 END STEP  404
P03 END STEP  406
P03 END STEP  407
P03 END STEP  410
P03 END STEP  411
P03 END STEP  412
P03 END STEP  413
P03 END STEP  414
P03 END STEP  415
P03 END STEP  422
P03 END STEP  424
P03 END STEP  426
P02 END SECTION  4 
D02 END: PROGRAM CYCLE: PASS = 1     

D03 HALT: COMPLETE PROGRAM CYCLE

Programmed halt, CIR: 030375 (HALT 15), P: 010300 (BR P-230)


-----------------------------------------
D419A - Cartridge Disc (user interaction)
-----------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading and executing the diagnostic.


D99 01 CARTRIDGE DISC (HP 30129A) DIAGNOSTIC CONFIGURATION (D419A.01.4)
(C)COPYRIGHT HEWLETT PACKARD COMPANY 1976.
Q99 02 DECIMAL DEVICE NUMBER?
4
Q99 03 MAXIMUM ERROR PRINT COUNT?
999
P99 55 UPDATE SWITCH REGISTER

sim> deposit SWCH 140000
sim> go

Q99 61 RESTART?(YES/NO)
NO
Q99 06 PRESENT SECTION REGISTER: %177000 DO YOU WISH TO CHANGE?(YES/NO)
YES
Q99 06 UPDATE  SECTION REGISTER: %
177002
Q99 06 PRESENT SECTION REGISTER: %177002 DO YOU WISH TO CHANGE?(YES/NO)
NO
P99 51 RESET SWITCH 1 (CHANGE)

sim> deposit SWCH 100001
sim> go

P99 05 RESET BOTH PROT.DATA SWITCHES,SET SWITCH FORMAT AND SET UNIT TO 0

Q99 42 WISH TO EXECUTE INTERACTIVE PORTION IN SECTION 1 (YES/NO)
YES

D99 07 CARTRIDGE DISC (HP 30129A) DIAGNOSTIC OFF-LINE (D419A.01.4)
Q18 68 DO YOU WISH FORMAT DISC? (YES/NO)
NO
P19 19 SET UPPER DATA PROTECT SWITCH

sim> set DS0 PROTECT=UPPER
sim> go

P19 27 RESET SWITCH FORMAT

sim> set DS0 NOFORMAT
sim> go

P19 19 RESET UPPER DATA PROTECT SWITCH

sim> set DS0 UNPROTECT=UPPER
sim> go

P19 20 SET LOWER DATA PROTECT SWITCH

sim> set DS0 PROTECT=LOWER
sim> go

P19 26 SET SWITCH FORMAT

sim> set DS0 FORMAT
sim> go

P19 19 SET UPPER DATA PROTECT SWITCH

sim> set DS0 PROTECT=UPPER
sim> go

P19 27 RESET SWITCH FORMAT

sim> set DS0 NOFORMAT
sim> go

P19 05 RESET BOTH PROT.DATA SWITCHES,SET SWITCH FORMAT

sim> set DS0 UNPROTECT
sim> set DS0 FORMAT
sim> go

P20 58 RESET RUN SWITCH AT UNIT 0

sim> set DS0 UNLOAD
sim> go

P20 58 SET RUN SWITCH AND WAIT UNTIL READY

sim> set DS0 LOAD
sim> go

D92 57 SHORT PASS 0001

    CYL:  HEAD0% HEAD1% HEAD2%    (ERROR TABLES)

    UNIT0 UNIT1 UNIT2 UNIT3 UNIT4 UNIT5 UNIT6 UNIT7 
    0000  0000  0000  0000  0000  0000  0000  0000    

P92 47 PAUSE AT PASS  000001


--------------------------------------------------
D419A - Cartridge Disc (multiple unit, short pass)
--------------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading and executing the diagnostic.


D99 01 CARTRIDGE DISC (HP 30129A) DIAGNOSTIC CONFIGURATION (D419A.01.4)
(C)COPYRIGHT HEWLETT PACKARD COMPANY 1976.
Q99 02 DECIMAL DEVICE NUMBER?
4
Q99 03 MAXIMUM ERROR PRINT COUNT?
999
P99 55 UPDATE SWITCH REGISTER

sim> deposit SWCH 140000
sim> go

Q99 61 RESTART?(YES/NO)
NO
Q99 06 PRESENT SECTION REGISTER: %177000 DO YOU WISH TO CHANGE?(YES/NO)
YES
Q99 06 UPDATE  SECTION REGISTER: %
137402
Q99 06 PRESENT SECTION REGISTER: %137402 DO YOU WISH TO CHANGE?(YES/NO)
NO
P99 08 UNIT NUMBER TABLE
01 DRIVE(S);00
Q99 09 WISH TO ALTER TABLE?
YES
Q99 10 ENTER UNIT NUMBERS SEPARATED BY COMMAS
0,1,2,3,4,5,6,7
P99 08 UNIT NUMBER TABLE
08 DRIVE(S);00  01  02  03  04  05  06  07
Q99 09 WISH TO ALTER TABLE?
NO
P99 51 RESET SWITCH 1 (CHANGE)

sim> deposit SWCH 100001
sim> go

P99 05 RESET BOTH PROT.DATA SWITCHES,SET SWITCH FORMAT AND SET UNIT TO 0

Q99 42 WISH TO EXECUTE INTERACTIVE PORTION IN SECTION 1 (YES/NO)
NO

D99 07 CARTRIDGE DISC (HP 30129A) DIAGNOSTIC OFF-LINE (D419A.01.4)
D92 57 SHORT PASS 0001

    CYL:  HEAD0% HEAD1% HEAD2%    (ERROR TABLES)

    UNIT0 UNIT1 UNIT2 UNIT3 UNIT4 UNIT5 UNIT6 UNIT7 
    0000  0000  0000  0000  0000  0000  0000  0000    

P92 47 PAUSE AT PASS  000001


-------------------------------------------------
D419A - Cartridge Disc (multiple unit, long pass)
-------------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading and executing the diagnostic.


D99 01 CARTRIDGE DISC (HP 30129A) DIAGNOSTIC CONFIGURATION (D419A.01.4)
(C)COPYRIGHT HEWLETT PACKARD COMPANY 1976.
Q99 02 DECIMAL DEVICE NUMBER?
4
Q99 03 MAXIMUM ERROR PRINT COUNT?
999
P99 55 UPDATE SWITCH REGISTER

sim> deposit SWCH 140000
sim> go

Q99 61 RESTART?(YES/NO)
NO
Q99 06 PRESENT SECTION REGISTER: %177000 DO YOU WISH TO CHANGE?(YES/NO)
YES
Q99 06 UPDATE  SECTION REGISTER: %
137400
Q99 06 PRESENT SECTION REGISTER: %137400 DO YOU WISH TO CHANGE?(YES/NO)
NO
P99 08 UNIT NUMBER TABLE
01 DRIVE(S);00
Q99 09 WISH TO ALTER TABLE?
YES
Q99 10 ENTER UNIT NUMBERS SEPARATED BY COMMAS
0,1
P99 08 UNIT NUMBER TABLE
02 DRIVE(S);00  01
Q99 09 WISH TO ALTER TABLE?
NO
P99 51 RESET SWITCH 1 (CHANGE)

sim> deposit SWCH 100001
sim> go

P99 05 RESET BOTH PROT.DATA SWITCHES,SET SWITCH FORMAT AND SET UNIT TO 0

Q99 42 WISH TO EXECUTE INTERACTIVE PORTION IN SECTION 1 (YES/NO)
NO

D99 07 CARTRIDGE DISC (HP 30129A) DIAGNOSTIC OFF-LINE (D419A.01.4)
D92 56 LONG  PASS 0001

    CYL:  HEAD0% HEAD1% HEAD2%    (ERROR TABLES)

    UNIT0 UNIT1 UNIT2 UNIT3 UNIT4 UNIT5 UNIT6 UNIT7 
    0000  0000  0000  0000  0000  0000  0000  0000    

P92 47 PAUSE AT PASS  000001


---------------------------------------------------------
D433A - 7970E Nine-Track Magnetic Tape (user interaction)
---------------------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading and executing the diagnostic.


HP 30115A 9-TRACK MAGNETIC TAPE (D433A.01.4)  
       (STAND-ALONE DIAGNOSTIC PROGRAM) 

(C) COPYRIGHT  HEWLETT-PACKARD COMPANY 1976.


Q010 TAPE DEVICE NUMBER?  6
Q011 TIMER DEVICE NUMBER? 3
Q012 MAXIMUM ERROR PRINT COUNT? 100
P005 TYPE FOLLOWING CONTROL
      A'CR'-AUTO,  R'CR'-RESTART,            
      M'CR'-MANU,  'CR'-RESUME,   YOUR CODE? M
D015 PRESENT SECTION REGISTER:%077414 DO YOU WISH TO CHANGE?(YES/NO)YES
D015 UPDATE  SECTION REGISTER:%000014
D015 PRESENT SECTION REGISTER:%000014 DO YOU WISH TO CHANGE?(YES/NO)NO
P015 MANU PROCES:  UPDATE SWITCH REGISTER (CR)

 NEW INT.SW.REG 1 000 000 000 001 001
P019 ON-LINE/RESET TEST 
P026 LOAD TAPE(RING),  PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> attach -n MS0 SCRATCH.TAPE
sim> set MS0 OFFLINE
sim> go

P027 PUSH DRIVE 0, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS0 ONLINE
sim> go

P028 PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> set MS0 OFFLINE
sim> go

P027 PUSH DRIVE 1, ON-LINE AND TYPE RESPONSE 'CR' 

sim> detach MS0
sim> attach MS1 scratch.tape
sim> go

P028 PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> set MS1 OFFLINE
sim> go

P027 PUSH DRIVE 2, ON-LINE AND TYPE RESPONSE 'CR' 

sim> detach MS1
sim> attach MS2 scratch.tape
sim> go

P028 PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> set MS2 OFFLINE
sim> go

P027 PUSH DRIVE 3, ON-LINE AND TYPE RESPONSE 'CR' 

sim> detach MS2
sim> attach MS3 scratch.tape
sim> go

P028 PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> set MS3 OFFLINE
sim> go

P029 LOAD TAPE(RING), PUSH OFF,RESET, ON-LINE AND 
P056 TYPE SELECTED DRIVE ?  

sim> detach MS3
sim> attach MS0 scratch.tape
sim> set MS0 OFFLINE
sim> go
0
P038 PUSH  DRIVE 0 BUTTON & TYPE RESPONSE 'CR'

sim> set MS0 ONLINE
sim> go

P039 CHECK LIGHT RESET, PUSH ON-LINE AND RESPOND  

sim> set MS0 ONLINE
sim> go

P029 LOAD TAPE(RING), PUSH OFF,RESET, ON-LINE AND TYPE RESPONSE 'CR'

sim> set MS0 OFFLINE
sim> go

P030 CHECK LIGHT WRITE-ENABLE, PUSH DRIVE 0 AND TYPE RESPONSE 'CR'

sim> set MS0 ONLINE
sim> go

P030 CHECK LIGHT WRITE-ENABLE, PUSH DRIVE 1 AND TYPE RESPONSE 'CR'

sim> detach MS0
sim> attach MS1 scratch.tape
sim> go

P030 CHECK LIGHT WRITE-ENABLE, PUSH DRIVE 2 AND TYPE RESPONSE 'CR'

sim> detach MS1
sim> attach MS2 scratch.tape
sim> go

P030 CHECK LIGHT WRITE-ENABLE, PUSH DRIVE 3 AND TYPE RESPONSE 'CR'

sim> detach MS2
sim> attach MS3 scratch.tape
sim> go

P029 LOAD TAPE(RING), PUSH OFF,RESET, ON-LINE AND TYPE RESPONSE 'CR'

sim> detach MS3
sim> attach MS0 scratch.tape
sim> set MS0 OFFLINE
sim> go

P032 PUSH DRIVE 0 AND TYPE RESPONSE 'CR'

sim> set MS0 ONLINE
sim> go

P033 PUSH RESET, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS0 OFFLINE
sim> set MS0 ONLINE
sim> go

P032 PUSH DRIVE 1 AND TYPE RESPONSE 'CR'

sim> detach MS0
sim> attach MS1 scratch.tape
sim> go

P033 PUSH RESET, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS1 OFFLINE
sim> set MS1 ONLINE
sim> go

P032 PUSH DRIVE 2 AND TYPE RESPONSE 'CR'

sim> detach MS1
sim> attach MS2 scratch.tape
sim> go

P033 PUSH RESET, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS2 OFFLINE
sim> set MS2 ONLINE
sim> go

P032 PUSH DRIVE 3 AND TYPE RESPONSE 'CR'

sim> detach MS2
sim> attach MS3 scratch.tape
sim> go

P033 PUSH RESET, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS3 OFFLINE
sim> set MS3 ONLINE
sim> go

P034 PUT TAPE(RING), PUSH OFF, RESET AND RESPOND  'CR'

sim> detach MS3
sim> attach MS0 scratch.tape
sim> set MS0 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 0 AND TAPE RESPONSE 'CR' 

sim> set MS0 ONLINE
sim> go

P036 PUSH RESET AND TYPE RESPONSE 'CR'

sim> set MS0 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 1 AND TAPE RESPONSE 'CR' 

sim> detach MS0
sim> attach MS1 scratch.tape
sim> go

P036 PUSH RESET AND TYPE RESPONSE 'CR'

sim> set MS1 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 2 AND TAPE RESPONSE 'CR' 

sim> detach MS1
sim> attach MS2 scratch.tape
sim> go

P036 PUSH RESET AND TYPE RESPONSE 'CR'

sim> set MS2 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 3 AND TAPE RESPONSE 'CR' 

sim> detach MS2
sim> attach MS3 scratch.tape
sim> go

P036 PUSH RESET AND TYPE RESPONSE 'CR'

sim> set MS3 OFFLINE
sim> go

P037 FSR/BSR-TEST: TYPE DRIVE NUMBER AND 'CR'(EXECUTE) OR 'CR'(EXIT)0
P029 LOAD TAPE(RING), PUSH OFF,RESET, ON-LINE AND TYPE RESPONSE 'CR'

sim> detach MS3
sim> attach MS0 scratch.tape
sim> set MS0 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 0 AND TAPE RESPONSE 'CR' 

sim> set MS0 ONLINE
sim> go

[This test takes a long time.]

D031  TEST  SECTION M12 COMPL. 
P056 TYPE SELECTED DRIVE ?  0
P041 LOAD TAPE(RING), PUSH DRIVE 0 AND TYPE RESPONSE 'CR

sim> attach -n MS0 scratch.tape
sim> go

P042 REMOVE RING FROM REEL, PUT IT BACK  AND TYPE RESPONSE 'CR' 

sim> detach MS0
sim> attach -r MS0 scratch.tape
sim> go

P043 PUT RING BACK TO REEL, LOAD IT AND TYPE 'CR'(RESPONSE) 

sim> detach MS0
sim> attach MS0 scratch.tape
sim> go

D031  TEST  SECTION M13 COMPL. 
P060 01 PASS   000000 TOTAL ERRORS
P010 PAUSE AT PASS 01


------------------------------------------------------
D433A - 7970E Nine-Track Magnetic Tape (multiple unit)
------------------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading and executing the diagnostic.


HP 30115A 9-TRACK MAGNETIC TAPE (D433A.01.4)  
       (STAND-ALONE DIAGNOSTIC PROGRAM) 

(C) COPYRIGHT  HEWLETT-PACKARD COMPANY 1976.


Q010 TAPE DEVICE NUMBER?  6
Q011 TIMER DEVICE NUMBER? 3
Q012 MAXIMUM ERROR PRINT COUNT? 100
P005 TYPE FOLLOWING CONTROL
      A'CR'-AUTO,  R'CR'-RESTART,            
      M'CR'-MANU,  'CR'-RESUME,   YOUR CODE? A
D015 PRESENT SECTION REGISTER:%077414 DO YOU WISH TO CHANGE?(YES/NO)YES
D015 UPDATE  SECTION REGISTER:%077400
D015 PRESENT SECTION REGISTER:%077400 DO YOU WISH TO CHANGE?(YES/NO)NO

Q019 AUTO-PROCESS:  ENTER TAPE UNIT(B,E,NO) AT
Q020 DRIVE 0? E
Q020 DRIVE 1? E
Q020 DRIVE 2? E
Q020 DRIVE 3? E
P003 UNLOAD PROGRAM TAPE - LOAD TEST TAPE(S)  
Q030 ALL DEFINITIONS CORRECT(YES/NO)? YES
P011 UPDATE SWITCH REGISTER    (CR) 


 NEW INT.SW.REG 1 000 000 000 001 001
D031  TEST  SECTION A01 COMPL. 
D031  TEST  SECTION A02 COMPL. 
D031  TEST  SECTION A03 COMPL. 
D031  TEST  SECTION A04 COMPL. 
D031  TEST  SECTION A05 COMPL. 
D031  TEST  SECTION A06 COMPL. 
D031  TEST  SECTION A07 COMPL. 
P060 01 PASS   000000 TOTAL ERRORS
P010 PAUSE AT PASS 01


---------------------------------------------------------
D433A - 7970B Nine-Track Magnetic Tape (user interaction)
---------------------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading and executing the diagnostic.


HP 30115A 9-TRACK MAGNETIC TAPE (D433A.01.4)  
       (STAND-ALONE DIAGNOSTIC PROGRAM) 

(C) COPYRIGHT  HEWLETT-PACKARD COMPANY 1976.


Q010 TAPE DEVICE NUMBER?  6
Q011 TIMER DEVICE NUMBER? 3
Q012 MAXIMUM ERROR PRINT COUNT? 100
P005 TYPE FOLLOWING CONTROL
      A'CR'-AUTO,  R'CR'-RESTART,            
      M'CR'-MANU,  'CR'-RESUME,   YOUR CODE? M
D015 PRESENT SECTION REGISTER:%077414 DO YOU WISH TO CHANGE?(YES/NO)YES
D015 UPDATE  SECTION REGISTER:%000014
D015 PRESENT SECTION REGISTER:%000014 DO YOU WISH TO CHANGE?(YES/NO)NO
P015 MANU PROCES:  UPDATE SWITCH REGISTER (CR)

 NEW INT.SW.REG 1 000 000 000 001 001
P019 ON-LINE/RESET TEST 
P026 LOAD TAPE(RING),  PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> attach -n MS0 SCRATCH.TAPE
sim> set MS0 OFFLINE
sim> go

P027 PUSH DRIVE 0, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS0 ONLINE
sim> go

P028 PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> set MS0 OFFLINE
sim> go

P027 PUSH DRIVE 1, ON-LINE AND TYPE RESPONSE 'CR' 

sim> detach MS0
sim> attach MS1 scratch.tape
sim> go

P028 PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> set MS1 OFFLINE
sim> go

P027 PUSH DRIVE 2, ON-LINE AND TYPE RESPONSE 'CR' 

sim> detach MS1
sim> attach MS2 scratch.tape
sim> go

P028 PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> set MS2 OFFLINE
sim> go

P027 PUSH DRIVE 3, ON-LINE AND TYPE RESPONSE 'CR' 

sim> detach MS2
sim> attach MS3 scratch.tape
sim> go

P028 PUSH RESET, OFF AND TYPE RESPONSE 'CR' 

sim> set MS3 OFFLINE
sim> go

P029 LOAD TAPE(RING), PUSH OFF,RESET, ON-LINE AND 
P056 TYPE SELECTED DRIVE ?  

sim> detach MS3
sim> attach MS0 scratch.tape
sim> set MS0 OFFLINE
sim> go
0
P038 PUSH  DRIVE 0 BUTTON & TYPE RESPONSE 'CR'

sim> set MS0 ONLINE
sim> go

P039 CHECK LIGHT RESET, PUSH ON-LINE AND RESPOND  

sim> set MS0 ONLINE
sim> go

P029 LOAD TAPE(RING), PUSH OFF,RESET, ON-LINE AND TYPE RESPONSE 'CR'

sim> set MS0 OFFLINE
sim> go

P030 CHECK LIGHT WRITE-ENABLE, PUSH DRIVE 0 AND TYPE RESPONSE 'CR'

sim> set MS0 ONLINE
sim> go

P030 CHECK LIGHT WRITE-ENABLE, PUSH DRIVE 1 AND TYPE RESPONSE 'CR'

sim> detach MS0
sim> attach MS1 scratch.tape
sim> go

P030 CHECK LIGHT WRITE-ENABLE, PUSH DRIVE 2 AND TYPE RESPONSE 'CR'

sim> detach MS1
sim> attach MS2 scratch.tape
sim> go

P030 CHECK LIGHT WRITE-ENABLE, PUSH DRIVE 3 AND TYPE RESPONSE 'CR'

sim> detach MS2
sim> attach MS3 scratch.tape
sim> go

P029 LOAD TAPE(RING), PUSH OFF,RESET, ON-LINE AND TYPE RESPONSE 'CR'

sim> detach MS3
sim> attach MS0 scratch.tape
sim> set MS0 OFFLINE
sim> go

P032 PUSH DRIVE 0 AND TYPE RESPONSE 'CR'

sim> set MS0 ONLINE
sim> go

P033 PUSH RESET, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS0 OFFLINE
sim> set MS0 ONLINE
sim> go

P032 PUSH DRIVE 1 AND TYPE RESPONSE 'CR'

sim> detach MS0
sim> attach MS1 scratch.tape
sim> go

P033 PUSH RESET, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS1 OFFLINE
sim> set MS1 ONLINE
sim> go

P032 PUSH DRIVE 2 AND TYPE RESPONSE 'CR'

sim> detach MS1
sim> attach MS2 scratch.tape
sim> go

P033 PUSH RESET, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS2 OFFLINE
sim> set MS2 ONLINE
sim> go

P032 PUSH DRIVE 3 AND TYPE RESPONSE 'CR'

sim> detach MS2
sim> attach MS3 scratch.tape
sim> go

P033 PUSH RESET, ON-LINE AND TYPE RESPONSE 'CR' 

sim> set MS3 OFFLINE
sim> set MS3 ONLINE
sim> go

P034 PUT TAPE(RING), PUSH OFF, RESET AND RESPOND  'CR'

sim> detach MS3
sim> attach MS0 scratch.tape
sim> set MS0 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 0 AND TAPE RESPONSE 'CR' 

sim> set MS0 ONLINE
sim> go

P036 PUSH RESET AND TYPE RESPONSE 'CR'

sim> set MS0 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 1 AND TAPE RESPONSE 'CR' 

sim> detach MS0
sim> attach MS1 scratch.tape
sim> go

P036 PUSH RESET AND TYPE RESPONSE 'CR'

sim> set MS1 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 2 AND TAPE RESPONSE 'CR' 

sim> detach MS1
sim> attach MS2 scratch.tape
sim> go

P036 PUSH RESET AND TYPE RESPONSE 'CR'

sim> set MS2 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 3 AND TAPE RESPONSE 'CR' 

sim> detach MS2
sim> attach MS3 scratch.tape
sim> go

P036 PUSH RESET AND TYPE RESPONSE 'CR'

sim> set MS3 OFFLINE
sim> go

P037 FSR/BSR-TEST: TYPE DRIVE NUMBER AND 'CR'(EXECUTE) OR 'CR'(EXIT)0
P029 LOAD TAPE(RING), PUSH OFF,RESET, ON-LINE AND TYPE RESPONSE 'CR'

sim> detach MS3
sim> attach MS0 scratch.tape
sim> set MS0 OFFLINE
sim> go

P035 PUSH ON-LINE, DRIVE 0 AND TAPE RESPONSE 'CR' 

sim> set MS0 ONLINE
sim> go

[This test takes a long time.]

D031  TEST  SECTION M12 COMPL. 
P056 TYPE SELECTED DRIVE ?  0
P041 LOAD TAPE(RING), PUSH DRIVE 0 AND TYPE RESPONSE 'CR

sim> attach -n MS0 scratch.tape
sim> go

P042 REMOVE RING FROM REEL, PUT IT BACK  AND TYPE RESPONSE 'CR' 

sim> detach MS0
sim> attach -r MS0 scratch.tape
sim> go

P043 PUT RING BACK TO REEL, LOAD IT AND TYPE 'CR'(RESPONSE) 

sim> detach MS0
sim> attach MS0 scratch.tape
sim> go

D031  TEST  SECTION M13 COMPL. 
P060 01 PASS   000000 TOTAL ERRORS
P010 PAUSE AT PASS 01


------------------------------------------------------
D433A - 7970B Nine-Track Magnetic Tape (multiple unit)
------------------------------------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading and executing the diagnostic.


HP 30115A 9-TRACK MAGNETIC TAPE (D433A.01.4)  
       (STAND-ALONE DIAGNOSTIC PROGRAM) 

(C) COPYRIGHT  HEWLETT-PACKARD COMPANY 1976.


Q010 TAPE DEVICE NUMBER?  6
Q011 TIMER DEVICE NUMBER? 3
Q012 MAXIMUM ERROR PRINT COUNT? 100
P005 TYPE FOLLOWING CONTROL
      A'CR'-AUTO,  R'CR'-RESTART,            
      M'CR'-MANU,  'CR'-RESUME,   YOUR CODE? A
D015 PRESENT SECTION REGISTER:%077414 DO YOU WISH TO CHANGE?(YES/NO)YES
D015 UPDATE  SECTION REGISTER:%067400
D015 PRESENT SECTION REGISTER:%067400 DO YOU WISH TO CHANGE?(YES/NO)NO

Q019 AUTO-PROCESS:  ENTER TAPE UNIT(B,E,NO) AT
Q020 DRIVE 0? B
Q020 DRIVE 1? B
Q020 DRIVE 2? B
Q020 DRIVE 3? B
P003 UNLOAD PROGRAM TAPE - LOAD TEST TAPE(S)  
Q030 ALL DEFINITIONS CORRECT(YES/NO)? YES
P011 UPDATE SWITCH REGISTER    (CR) 


 NEW INT.SW.REG 1 000 000 000 000 001
D031  TEST  SECTION A01 COMPL. 
D031  TEST  SECTION A02 COMPL. 
E274 STEP-0434 COMP. AND READ CRCC ARE DIFFER.
E116 STEP-0434  EXPECT.- OBTAIN. CRCC         
                120200   032400               
E274 STEP-0437 COMP. AND READ CRCC ARE DIFFER.
E116 STEP-0437  EXPECT.- OBTAIN. CRCC         
                000310   032400               
E274 STEP-0434 COMP. AND READ CRCC ARE DIFFER.
E116 STEP-0434  EXPECT.- OBTAIN. CRCC         
                120200   032400               
E274 STEP-0437 COMP. AND READ CRCC ARE DIFFER.
E116 STEP-0437  EXPECT.- OBTAIN. CRCC         
                000310   032400               
E274 STEP-0434 COMP. AND READ CRCC ARE DIFFER.
E116 STEP-0434  EXPECT.- OBTAIN. CRCC         
                120200   032400               
E274 STEP-0437 COMP. AND READ CRCC ARE DIFFER.
E116 STEP-0437  EXPECT.- OBTAIN. CRCC         
                000310   032400               
E274 STEP-0434 COMP. AND READ CRCC ARE DIFFER.
E116 STEP-0434  EXPECT.- OBTAIN. CRCC         
                120200   032400               
E274 STEP-0437 COMP. AND READ CRCC ARE DIFFER.
E116 STEP-0437  EXPECT.- OBTAIN. CRCC         
                000310   032400               
D065 000020 ERRORS IN SECTION 04  
D066 000020 TOTAL ERRORS
D031  TEST  SECTION A04 COMPL. 
D031  TEST  SECTION A05 COMPL. 
D031  TEST  SECTION A06 COMPL. 
D031  TEST  SECTION A07 COMPL. 
P060 01 PASS   000020 TOTAL ERRORS
P010 PAUSE AT PASS 01


---------------------------
D435A - Universal Interface
---------------------------

Loading the stand-alone loader.

Cold load complete, P: 001231 (LOAD P+14)

Loading and executing the diagnostic.


D100  UNIV. INTERFACE TEST (HP D435A.01.01)
(C)COPYRIGHT HEWLETT PACKARD COMPANY 1976.
****************** WARNING ******************
this diagnostic has tests which will produce error
conditions on interface boards which have datecodes
PRIOR TO 1504.

Q110  DEVICE NUMBER? 14
Q112  INTERRUPT MASK? 8
Q113  NEGATIVE TRUE? NO
Q114  CHANGE INTERNAL SWITCH REGISTER? ? YES
P114  INTERNAL SWITCH REGISTER

Programmed halt, CIR: 030366 (HALT 6), P: 026015 (DDEL,DDEL)

Configuring the switch register.

Q115  SECTION LIST? 
Q116  READER-PUNCH INTERFACE ? NO
D102  END SECTION 0 

D100  UNIV. INTERFACE TEST (HP D435A.01.01)
(C)COPYRIGHT HEWLETT PACKARD COMPANY 1976.
****************** WARNING ******************
this diagnostic has tests which will produce error
conditions on interface boards which have datecodes
PRIOR TO 1504.
P120  CONT6 ON, REST OFF

Programmed halt, CIR: 030367 (HALT 7), P: 022145 (DDEL,DDEL)

[Verifying control bits.]

P120  CONT7 ON, REST OFF

Programmed halt, CIR: 030367 (HALT 7), P: 022145 (DDEL,DDEL)

P120  CONT8 ON, REST OFF

Programmed halt, CIR: 030367 (HALT 7), P: 022145 (DDEL,DDEL)

P120  CONT9 ON, REST OFF

Programmed halt, CIR: 030367 (HALT 7), P: 022145 (DDEL,DDEL)

P120  CONT10 ON, REST OFF

Programmed halt, CIR: 030367 (HALT 7), P: 022145 (DDEL,DDEL)

P121  JUMPER J2W1 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W2 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W3 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W4 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W5 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W6 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W7 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W8 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W9 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P121  JUMPER J2W10 LOW, REST HIGH

Programmed halt, CIR: 030370 (HALT 10), P: 022056 (DDEL,DDEL)

P122  DEVICE END ASSERTED

Programmed halt, CIR: 030371 (HALT 11), P: 021505 (DDEL,DDEL)

P124  BIT 0 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 1 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 2 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 3 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 4 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 5 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 6 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 7 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 8 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 9 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 10 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 11 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 12 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 13 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 14 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

P124  BIT 15 HIGH, REST LOW

Programmed halt, CIR: 030373 (HALT 13), P: 021407 (DDEL,DDEL)

D102  END SECTION 1 
D102  END SECTION 2 
D102  END SECTION 3 
D102  END SECTION 4 
D102  END SECTION 5 
D102  END SECTION 6 
D102  END SECTION 7 
D102  END SECTION 8 
D102  END SECTION 9 
D102  END SECTION 10 
P103  PASS 1 

Programmed halt, CIR: 030375 (HALT 15), P: 010265 (DDEL,DDEL)



------------------------------
Diagnostics Suite Run Complete
------------------------------

Run ended on Sep 19, 2024 at 15:28:27

Goodbye
Log file closed