; CPU diagnostic section 1 (D420A)
;   Parameter 1 = path to diagnostic tape.
;
; Preconfiguration is used because the SR test seems to be scheduled
; before the SSR can be set externally.
;
; Configuration locations:
;
;     Location     Default Value  Contents
;   -------------  -------------  ---------------------------------------------------
;   DB+0   002000  000001          Switch Register setting
;   DB+1   002001  000000          Section Select Register setting
;   DB+2   002002  001000          Version and update level
;   DB+3   002003  000001          Section number
;   DB+5   002005  000000          Step number


echo
echo
echo ---------------------
echo D420A - CPU Section 1
echo ---------------------
echo
echo Loading the diagnostic.


; Cold load the CPU diagnostics tape.

attach -e -r MS0 %130000-11016_Rev-1244_CPU-64K.tape
boot MS0


echo
echo Configuring the diagnostic.

; Preconfigure the diagnostic.
;
; Set the Internal Switch Register options:
;
;   bit  0 = select the external switch register
;   bit  1 = modify the Section Select Register
;   bit  2 = optional firmware is installed
;   bit  3 = not used
;   bit  4 = not used
;   bit  5 = not used
;   bit  6 = not used
;   bit  7 = not used
;   bit  8 = not used
;   bit  9 = not used
;   bit 10 = not used
;   bit 11 = loop on the last step
;   bit 12 = not used
;   bit 13 = halt at the end of each step
; + bit 15 = halt at the end of each pass

deposit 2000 000001


; Set the Section Select Register options:
;
; + bit  0 = enable the switch register test
; + bit  1 = enable the PB/PL register test
; + bit  2 = enable the SR register test
; + bit  3 = loop only once on each step
;   bit  4 = not used
;   bit  5 = not used
;   bit  6 = not used
;   bit  7 = not used
;   bit  8 = not used
;   bit  9 = not used
;   bit 10 = not used
;   bit 11 = not used
;   bit 12 = not used
;   bit 13 = not used
;   bit 14 = not used
;   bit 15 = not used

deposit 2001 170000


; Set the CPU to stop when a PAUS is executed.

set CPU STOP=PAUSE


; Start the diagnostic.

echo
echo Executing the diagnostic.
echo Expect pause 0 if successful.
go


; Continue past the pause.

assert CIR=030020

echo
echo Continuing the diagnostic.
echo Expect halt 6 if successful.
go -b


; SR Register Test (step 0).
;
; Verify HALT 6 and CNTR = 0.

assert CIR=030366

echo
echo Verifying the SR register and continuing the diagnostic.
echo Expect halt 7 if successful.

assert CNTR=0
go


; Verify HALT 7 and CNTR = 2.

assert CIR=030367

echo
echo Verifying the SR register and continuing the diagnostic.
echo Expect halt 10 if successful.

assert CNTR=2
go


; Verify HALT 10 and CNTR = 4.

assert CIR=030370

echo
echo Verifying the SR register and continuing the diagnostic.
echo Expect halt 11 if successful.

assert CNTR=4
go


; PB/PL Register Test (step 1).
;
; Verify HALT 11 and PB = 10004, P = 10017, PL = 10023.

assert CIR=030371

echo
echo Verifying the PB/P/PL registers and continuing the diagnostic.
echo Expect halt 3 if successful.

assert PB=010004
assert P=010017
assert PL=010023
go


; Switch Register Test (step 2).
;
; Verify HALT 3.

assert CIR=030363

echo
echo Setting all even SWCH register switches and continuing the diagnostic.
echo Expect halt 4 if successful.

deposit SWCH 125252
go


; Verify HALT 4.

assert CIR=030364

echo
echo Setting all odd SWCH register switches and continuing the diagnostic.
echo Expect halt 5 if successful.

deposit SWCH 052525
go


; Verify HALT 5.

assert CIR=030365

echo
echo Restoring the switch register and continuing the diagnostic.
echo Expect halt 15 for successful completion.

deposit SWCH 000001
go


; End of the diagnostic.
;
; Verify HALT 15 for a successful pass.

assert CIR=030375


; Restore the hardware configuration.

set CPU NOSTOP