>>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000007 absolute read >>CPP cmd: Channel processor executing SLFT >>CPP data: 00.000772 000000 absolute write >>CPP serv: Completion delay 389 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000005 absolute read >>CPP cmd: Channel processor executing IOCL >>CPP data: 00.000013 000000 absolute write >>IMBA imbus: Channel 1 received opcode I/O Write command IOCL register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Write command IOCL register 0 data 000000 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000004 absolute read >>CPP cmd: Channel processor executing SED2 >>CPP data: 00.000771 000001 absolute read >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000004 absolute read >>CPP cmd: Channel processor executing SED2 >>CPP data: 00.000771 000001 absolute read >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000003 absolute read >>CPP cmd: Channel processor executing WIOC >>CPP data: 00.000771 100000 absolute read >>CPP data: 00.000772 000000 absolute read >>CPP data: 00.000003 000000 absolute read >>IMBA imbus: Channel 1 received opcode I/O Write command SMSK register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Write command SMSK register 0 data 000000 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000004 absolute read >>CPP cmd: Channel processor executing SED2 >>CPP data: 00.000771 000000 absolute read >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000004 absolute read >>CPP cmd: Channel processor executing SED2 >>CPP data: 00.000771 000001 absolute read >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000004 absolute read >>CPP cmd: Channel processor executing SED2 >>CPP data: 00.000771 000001 absolute read >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000003 absolute read >>CPP cmd: Channel processor executing WIOC >>CPP data: 00.000771 100000 absolute read >>CPP data: 00.000772 000020 absolute read >>CPP data: 00.000103 000000 absolute read >>IMBA imbus: Channel 1 received opcode I/O Write command SMSK register 0 data 000020 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Write command SMSK register 0 data 000020 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000000 absolute read >>CPP cmd: Channel processor executing SIOP >>CPP data: 00.000771 000130 absolute read >>CPP data: 00.000773 101224 absolute read >>CPP data: 00.000543 000000 absolute read >>CPP data: 00.000540 101224 absolute write >>CPP data: 00.000543 140000 absolute write >>GIC imbus: Channel 11 received opcode I/O Write command SIOP register 0 data 000000 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | CSRQ1 | PRO >>GIC imbus: Channel 11 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>CPP opnd: 00.101224 006000 Write Register 0 value 040136 >>CPP opnd: 00.101226 006000 Write Register 0 value 000040 >>CPP opnd: 00.101230 006000 Write Register 0 value 100060 >>CPP opnd: 00.101232 006000 Write Register 0 value 040137 >>CPP opnd: 00.101234 006000 Write Register 0 value 100017 >>CPP opnd: 00.101236 006000 Write Register 0 value 140000 >>CPP opnd: 00.101240 006000 Write Register 0 value 000037 >>CPP opnd: 00.101242 005400 Read Register 0 | response 177777 >>CPP opnd: 00.101244 006001 Write Register 1 value 000000 >>CPP opnd: 00.101246 006001 Write Register 1 value 177777 >>CPP opnd: 00.101250 005401 Read Register 1 | response 177777 >>CPP opnd: 00.101252 006002 Write Register 2 value 000000 >>CPP opnd: 00.101254 006002 Write Register 2 value 177777 >>CPP opnd: 00.101256 005402 Read Register 2 | response 177777 >>CPP opnd: 00.101260 006003 Write Register 3 value 000000 >>CPP opnd: 00.101262 006003 Write Register 3 value 177777 >>CPP opnd: 00.101264 005403 Read Register 3 | response 177777 >>CPP opnd: 00.101266 006004 Write Register 4 value 000000 >>CPP opnd: 00.101270 006004 Write Register 4 value 177777 >>CPP opnd: 00.101272 005404 Read Register 4 | response 177777 >>CPP opnd: 00.101274 006005 Write Register 5 value 000000 >>CPP opnd: 00.101276 006005 Write Register 5 value 177777 >>CPP opnd: 00.101300 005405 Read Register 5 | response 177777 >>CPP opnd: 00.101302 006006 Write Register 6 value 000000 >>CPP opnd: 00.101304 006006 Write Register 6 value 177777 >>CPP opnd: 00.101306 005406 Read Register 6 | response 177777 >>CPP opnd: 00.101310 006007 Write Register 7 value 000000 >>CPP opnd: 00.101312 006007 Write Register 7 value 177777 >>CPP opnd: 00.101314 005407 Read Register 7 | response 177777 >>CPP opnd: 00.101316 006010 Write Register 8 value 000000 >>CPP opnd: 00.101320 006010 Write Register 8 value 177777 >>CPP opnd: 00.101322 005410 Read Register 8 | response 177777 >>CPP opnd: 00.101324 006011 Write Register 9 value 000000 >>CPP opnd: 00.101326 006011 Write Register 9 value 177777 >>CPP opnd: 00.101330 005411 Read Register 9 | response 177777 >>CPP opnd: 00.101332 006012 Write Register A value 000000 >>CPP opnd: 00.101334 006012 Write Register A value 177777 >>CPP opnd: 00.101336 005412 Read Register A | response 177777 >>CPP opnd: 00.101340 006013 Write Register B value 000000 >>CPP opnd: 00.101342 006013 Write Register B value 177777 >>CPP opnd: 00.101344 005413 Read Register B | response 177777 >>CPP opnd: 00.101346 006014 Write Register C value 000000 >>CPP opnd: 00.101350 006014 Write Register C value 177777 >>CPP opnd: 00.101352 005414 Read Register C | response 177777 >>CPP opnd: 00.101354 006014 Write Register C value 000007 >>CPP opnd: 00.101356 006015 Write Register D value 000000 >>CPP opnd: 00.101360 006015 Write Register D value 177777 >>CPP opnd: 00.101362 005415 Read Register D | response 177777 >>CPP opnd: 00.101364 006016 Write Register E value 000000 >>CPP opnd: 00.101366 006016 Write Register E value 177777 >>CPP opnd: 00.101370 005416 Read Register E | response 177777 >>CPP opnd: 00.101372 006017 Write Register F value 000000 >>CPP opnd: 00.101374 006017 Write Register F value 177777 >>CPP opnd: 00.101376 005417 Read Register F | response 177777 >>CPP opnd: 00.101400 000600 Interrupt/Halt 0000 | CPVA 0 >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor rescheduled >>CPP serv: Channel processor running >>GIC imbus: Channel 11 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 000020 with signals ADN | DDN | CSRQ1 | PRO >>CPP cmd: Channel processor servicing channel 11 >>GIC imbus: Channel 11 received opcode I/O Read command OBSI register 0 data 000000 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 001130 with signals ADN | DDN | CSRQ1 | PRO >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 1 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 1 (Status) status is controller | system controller >>GIC imbus: Channel 11 returned data 000030 with signals ADN | DDN | CSRQ1 | PRO >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 3 data 040377 with signals ADO | DDO | PRI >>GIC csrw: Register 3 (IRQ mask) control is parity error | status change | FIFO abort | poll response | SRQ | available | data | empty | DCL >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | CSRQ1 | PRO >>CPP data: 00.000543 140000 absolute read >>GIC imbus: Channel 11 received opcode I/O Write command SIOP register 0 data 000010 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 1 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 1 (Status) status is controller | system controller >>GIC imbus: Channel 11 returned data 000030 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 6 data 000140 with signals ADO | DDO | PRI >>GIC csrw: Register 6 (Control) control is parity freeze | REN | DMA inbound >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 4 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 4 (Poll mask) status is (none) >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 4 data 000200 with signals ADO | DDO | PRI >>GIC csrw: Register 4 (Poll mask) control is PP 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register F data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register F (Service info) control is DMA inbound | device 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 3 data 040377 with signals ADO | DDO | PRI >>GIC csrw: Register 3 (IRQ mask) control is parity error | status change | FIFO abort | poll response | SRQ | available | data | empty | DCL >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.000543 100000 absolute write >>CPP data: 00.000540 101224 absolute read >>CPP data: 00.101224 006000 absolute read >>CPP data: 00.101225 040136 absolute read >>CPP cmd: Executing Write Register 0 value 040136 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 0 data 040136 with signals ADO | DDO | PRI >>GIC csrw: Register 0 (FIFO) Data ATN | 136 sent to bus >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101226 006000 absolute read >>CPP data: 00.101227 000040 absolute read >>CPP cmd: Executing Write Register 0 value 000040 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 0 data 000040 with signals ADO | DDO | PRI >>GIC csrw: Register 0 (FIFO) Data 040 sent to bus >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101230 006000 absolute read >>CPP data: 00.101231 100060 absolute read >>CPP cmd: Executing Write Register 0 value 100060 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 0 data 100060 with signals ADO | DDO | PRI >>GIC csrw: Register 0 (FIFO) Data EOI | 060 sent to bus >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101232 006000 absolute read >>CPP data: 00.101233 040137 absolute read >>CPP cmd: Executing Write Register 0 value 040137 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 0 data 040137 with signals ADO | DDO | PRI >>GIC csrw: Register 0 (FIFO) Data ATN | 137 sent to bus >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101234 006000 absolute read >>CPP data: 00.101235 100017 absolute read >>CPP cmd: Executing Write Register 0 value 100017 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 0 data 100017 with signals ADO | DDO | PRI >>GIC csrw: Register 0 (FIFO) Reception enabled for count 15 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101236 006000 absolute read >>CPP data: 00.101237 140000 absolute read >>CPP cmd: Executing Write Register 0 value 140000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 0 data 140000 with signals ADO | DDO | PRI >>GIC csrw: Register 0 (FIFO) Reception enabled >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101240 006000 absolute read >>CPP data: 00.101241 000037 absolute read >>CPP cmd: Executing Write Register 0 value 000037 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 0 data 000037 with signals ADO | DDO | PRI >>GIC csrw: Register 0 (FIFO) Reception enabled for LF | count 31 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101242 005400 absolute read >>CPP data: 00.101243 177777 absolute read >>CPP cmd: Executing Read Register 0 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 0 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 0 (FIFO) Data 037 received from bus >>GIC imbus: Channel 11 returned data 000037 with signals ADN | DDN | PRO >>CPP data: 00.101243 000037 absolute write >>CPP data: 00.101244 006001 absolute read >>CPP data: 00.101245 000000 absolute read >>CPP cmd: Executing Write Register 1 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 1 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 1 (Status) control is (none) >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101246 006001 absolute read >>CPP data: 00.101247 177777 absolute read >>CPP cmd: Executing Write Register 1 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 1 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 1 (Status) control is frozen >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.000540 101250 absolute write >>CPP serv: Channel processor suspended >>CPP serv: Program delay 195 service scheduled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>CPP serv: Channel processor running >>CPP data: 00.000540 101250 absolute read >>CPP data: 00.101250 005401 absolute read >>CPP data: 00.101251 177777 absolute read >>CPP cmd: Executing Read Register 1 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 1 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 1 (Status) status is remote | controller | system controller | talker | listener | frozen >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101251 177777 absolute write >>CPP data: 00.101252 006002 absolute read >>CPP data: 00.101253 000000 absolute read >>CPP cmd: Executing Write Register 2 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 2 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 2 (IRQ conditions) control is (none) >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101254 006002 absolute read >>CPP data: 00.101255 177777 absolute read >>CPP cmd: Executing Write Register 2 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 2 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 2 (IRQ conditions) control is parity error | status change | FIFO abort | DCL >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101256 005402 absolute read >>CPP data: 00.101257 177777 absolute read >>CPP cmd: Executing Read Register 2 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 2 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 2 (IRQ conditions) status is empty >>GIC imbus: Channel 11 returned data 000002 with signals ADN | DDN | PRO >>CPP data: 00.101257 000002 absolute write >>CPP data: 00.101260 006003 absolute read >>CPP data: 00.101261 000000 absolute read >>CPP cmd: Executing Write Register 3 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 3 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 3 (IRQ mask) control is (none) >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101262 006003 absolute read >>CPP data: 00.101263 177777 absolute read >>CPP cmd: Executing Write Register 3 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 3 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 3 (IRQ mask) control is IRQ | parity error | status change | FIFO abort | poll response | SRQ | available | data | empty | DCL >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101264 005403 absolute read >>CPP data: 00.101265 177777 absolute read >>CPP cmd: Executing Read Register 3 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 3 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 3 (IRQ mask) status is IRQ | parity error | status change | FIFO abort | poll response | SRQ | available | data | empty | DCL >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101265 177777 absolute write >>CPP data: 00.101266 006004 absolute read >>CPP data: 00.101267 000000 absolute read >>CPP cmd: Executing Write Register 4 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 4 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 4 (Poll mask) control is (none) >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101270 006004 absolute read >>CPP data: 00.101271 177777 absolute read >>CPP cmd: Executing Write Register 4 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 4 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 4 (Poll mask) control is PP 0 | PP 1 | PP 2 | PP 3 | PP 4 | PP 5 | PP 6 | PP 7 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101272 005404 absolute read >>CPP data: 00.101273 177777 absolute read >>CPP cmd: Executing Read Register 4 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 4 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 4 (Poll mask) status is PP 0 | PP 1 | PP 2 | PP 3 | PP 4 | PP 5 | PP 6 | PP 7 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101273 177777 absolute write >>CPP data: 00.000540 101274 absolute write >>CPP serv: Channel processor suspended >>CPP serv: Program delay 195 service scheduled >>CPP serv: Channel processor running >>CPP data: 00.000540 101274 absolute read >>CPP data: 00.101274 006005 absolute read >>CPP data: 00.101275 000000 absolute read >>CPP cmd: Executing Write Register 5 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 5 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 5 (Poll sense) control is (none) >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101276 006005 absolute read >>CPP data: 00.101277 177777 absolute read >>CPP cmd: Executing Write Register 5 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 5 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 5 (Poll sense) control is PP 0 | PP 1 | PP 2 | PP 3 | PP 4 | PP 5 | PP 6 | PP 7 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101300 005405 absolute read >>CPP data: 00.101301 177777 absolute read >>CPP cmd: Executing Read Register 5 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 5 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 5 (Poll sense) status is PP 0 | PP 1 | PP 2 | PP 3 | PP 4 | PP 5 | PP 6 | PP 7 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101301 177777 absolute write >>CPP data: 00.101302 006006 absolute read >>CPP data: 00.101303 000000 absolute read >>CPP cmd: Executing Write Register 6 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 6 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 6 (Control) control is DMA inbound >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101304 006006 absolute read >>CPP data: 00.101305 177777 absolute read >>CPP cmd: Executing Write Register 6 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 6 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 6 (Control) control is 8 bit | parity freeze | REN | IFC | poll response | SRQ | DMA outbound | clear FIFO >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101306 005406 absolute read >>CPP data: 00.101307 177777 absolute read >>CPP cmd: Executing Read Register 6 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 6 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 6 (Control) status is 8 bit | parity freeze | REN | IFC | poll response | SRQ | DMA outbound | clear FIFO >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101307 177777 absolute write >>CPP data: 00.101310 006007 absolute read >>CPP data: 00.101311 000000 absolute read >>CPP cmd: Executing Write Register 7 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 7 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 7 (Bus address) control is bus address 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101312 006007 absolute read >>CPP data: 00.101313 177777 absolute read >>CPP cmd: Executing Write Register 7 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 7 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 7 (Bus address) control is talk always | listen always | bus address 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101314 005407 absolute read >>CPP data: 00.101315 177777 absolute read >>CPP cmd: Executing Read Register 7 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 7 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 7 (Bus address) status is omline | talk always | listen always | bus address 31 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101315 177777 absolute write >>CPP data: 00.101316 006010 absolute read >>CPP data: 00.101317 000000 absolute read >>CPP cmd: Executing Write Register 8 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 8 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 8 (DMA bank) control is DMA disabled | bank 000 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.000540 101320 absolute write >>CPP serv: Channel processor suspended >>CPP serv: Program delay 195 service scheduled >>CPP serv: Channel processor running >>CPP data: 00.000540 101320 absolute read >>CPP data: 00.101320 006010 absolute read >>CPP data: 00.101321 177777 absolute read >>CPP cmd: Executing Write Register 8 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 8 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 8 (DMA bank) control is DMA disabled | bank 377 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101322 005410 absolute read >>CPP data: 00.101323 177777 absolute read >>CPP cmd: Executing Read Register 8 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 8 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 8 (DMA bank) status is DMA enabled | state 37 | bank 377 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101323 177777 absolute write >>CPP data: 00.101324 006011 absolute read >>CPP data: 00.101325 000000 absolute read >>CPP cmd: Executing Write Register 9 value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 9 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 9 (DMA address) control is address 000000 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101326 006011 absolute read >>CPP data: 00.101327 177777 absolute read >>CPP cmd: Executing Write Register 9 value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register 9 data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register 9 (DMA address) control is address 177777 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101330 005411 absolute read >>CPP data: 00.101331 177777 absolute read >>CPP cmd: Executing Read Register 9 | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 9 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 9 (DMA address) status is address 177777 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101331 177777 absolute write >>CPP data: 00.101332 006012 absolute read >>CPP data: 00.101333 000000 absolute read >>CPP cmd: Executing Write Register A value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register A data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register A (DMA byte count) control is byte count 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101334 006012 absolute read >>CPP data: 00.101335 177777 absolute read >>CPP cmd: Executing Write Register A value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register A data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register A (DMA byte count) control is byte count 65535 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101336 005412 absolute read >>CPP data: 00.101337 177777 absolute read >>CPP cmd: Executing Read Register A | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register A data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register A (DMA byte count) status is byte count 65535 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101337 177777 absolute write >>CPP data: 00.101340 006013 absolute read >>CPP data: 00.101341 000000 absolute read >>CPP cmd: Executing Write Register B value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register B data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register B (DMA control) control is inbound | device 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101342 006013 absolute read >>CPP data: 00.101343 177777 absolute read >>CPP cmd: Executing Write Register B value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register B data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register B (DMA control) control is address freeze | inhibit CSRQ | right byte | inhibit EOI | outbound | disable diagnostic | device 7 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.000540 101344 absolute write >>CPP serv: Channel processor suspended >>CPP serv: Program delay 195 service scheduled >>CPP serv: Channel processor running >>CPP data: 00.000540 101344 absolute read >>CPP data: 00.101344 005413 absolute read >>CPP data: 00.101345 177777 absolute read >>CPP cmd: Executing Read Register B | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register B data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register B (DMA control) status is PHI IRQ | parity error | address overflow | memory timeout | busy | inhibit CSRQ | right byte | inhibit EOI | outbound | diagnostic | end state 3 | device 7 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101345 177777 absolute write >>CPP data: 00.101346 006014 absolute read >>CPP data: 00.101347 000000 absolute read >>CPP cmd: Executing Write Register C value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register C data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register C (Interrupt) control is clear | device 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101350 006014 absolute read >>CPP data: 00.101351 177777 absolute read >>CPP cmd: Executing Write Register C value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register C data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register C (Interrupt) control is set | device 7 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | IRQ | PRO >>GIC imbus: Channel 11 asserts IRQ >>CPP serv: Program delay 1 service scheduled >>CPP data: 00.101352 005414 absolute read >>CPP data: 00.101353 177777 absolute read >>CPP cmd: Executing Read Register C | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register C data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register C (Interrupt) status is IRQ 0 | IRQ 1 | IRQ 2 | IRQ 3 | IRQ 4 | IRQ 5 | IRQ 6 | IRQ 7 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | IRQ | PRO >>CPP data: 00.101353 177777 absolute write >>CPP data: 00.101354 006014 absolute read >>CPP data: 00.101355 000007 absolute read >>CPP cmd: Executing Write Register C value 000007 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register C data 000007 with signals ADO | DDO | PRI >>GIC csrw: Register C (Interrupt) control is clear | device 7 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101356 006015 absolute read >>CPP data: 00.101357 000000 absolute read >>CPP cmd: Executing Write Register D value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register D data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register D (Interrupt info) control is ignored >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101360 006015 absolute read >>CPP data: 00.101361 177777 absolute read >>CPP cmd: Executing Write Register D value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register D data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register D (Interrupt info) control is ignored >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101362 005415 absolute read >>CPP data: 00.101363 177777 absolute read >>CPP cmd: Executing Read Register D | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register D data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register D (Interrupt info) status is not valid | channel 11 | device 7 >>GIC imbus: Channel 11 returned data 000337 with signals ADN | DDN | PRO >>CPP data: 00.101363 000337 absolute write >>CPP data: 00.101364 006016 absolute read >>CPP data: 00.101365 000000 absolute read >>CPP cmd: Executing Write Register E value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register E data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register E (DMA abort) control is DMA abort >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101366 006016 absolute read >>CPP data: 00.101367 177777 absolute read >>CPP cmd: Executing Write Register E value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register E data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register E (DMA abort) control is DMA abort >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.000540 101370 absolute write >>CPP serv: Channel processor suspended >>CPP serv: Channel processor running >>CPP data: 00.000540 101370 absolute read >>CPP data: 00.101370 005416 absolute read >>CPP data: 00.101371 177777 absolute read >>CPP cmd: Executing Read Register E | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register E data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register E (DMA abort) status is S2 B | S1 CPP | channel ID 15 >>GIC imbus: Channel 11 returned data 177777 with signals ADN | DDN | PRO >>CPP data: 00.101371 177777 absolute write >>CPP data: 00.101372 006017 absolute read >>CPP data: 00.101373 000000 absolute read >>CPP cmd: Executing Write Register F value 000000 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register F data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register F (Service info) control is DMA inbound | device 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP data: 00.101374 006017 absolute read >>CPP data: 00.101375 177777 absolute read >>CPP cmd: Executing Write Register F value 177777 >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register F data 177777 with signals ADO | DDO | PRI >>GIC csrw: Register F (Service info) control is DMA SRQ | inhibit CSRQ | right byte | inhibit EOI | DMA outbound | disable diagnostic | device 7 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | CSRQ1 | PRO >>GIC imbus: Channel 11 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>CPP data: 00.101376 005417 absolute read >>CPP data: 00.101377 177777 absolute read >>CPP cmd: Executing Read Register F | response 177777 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register F data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register F (Service info) status is channel request | channel 11 | device 0 >>GIC imbus: Channel 11 returned data 000530 with signals ADN | DDN | PRO >>CPP data: 00.101377 000530 absolute write >>CPP data: 00.101400 000600 absolute read >>CPP data: 00.101401 000000 absolute read >>CPP cmd: Executing Interrupt/Halt 0000 | CPVA 0 >>GIC imbus: Channel 11 received opcode I/O Read command RIOC register 2 data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register 2 (IRQ conditions) status is empty >>GIC imbus: Channel 11 returned data 000002 with signals ADN | DDN | PRO >>CPP data: 00.000542 077771 absolute read >>CPP data: 00.077771 100000 absolute write >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register C data 000010 with signals ADO | DDO | PRI >>GIC csrw: Register C (Interrupt) control is set | device 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | IRQ | PRO >>GIC imbus: Channel 11 asserts IRQ >>CPP data: 00.000543 100000 absolute read >>CPP data: 00.000543 000000 absolute write >>CPP data: 00.000540 101402 absolute write >>CPP serv: Channel processor rescheduled >>CPP serv: Channel processor running >>GIC imbus: Channel 11 received opcode I/O Read command IPOLL register 0 data 000000 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 000020 with signals ADN | DDN | IRQ | PRO >>CPP cmd: Channel processor interrupted by channel 11 >>GIC imbus: Channel 11 received opcode I/O Read command OBII register 0 data 000000 with signals ADO | DDO | PRI >>GIC imbus: Channel 11 returned data 000130 with signals ADN | DDN | IRQ | PRO >>IMBA imbus: Channel 1 received opcode I/O Write command WIOC register 0 data 000130 with signals ADO | DDO | PRI >>IOP irq: Device number 125 asserted INTREQ at priority 12 >>IMBA imbus: Channel 1 returned data 000000 with signals ADN | DDN | PRO >>GIC imbus: Channel 11 received opcode I/O Write command WIOC register C data 000000 with signals ADO | DDO | PRI >>GIC csrw: Register C (Interrupt) control is clear | device 0 >>GIC imbus: Channel 11 returned data 000000 with signals ADN | DDN | PRO >>CPP serv: Channel processor idled >>IMBA iobus: Received data 000000 with signals INTPOLLIN >>IMBA iobus: Returned data 000130 with signals INTACK >>IOP irq: Device number 125 acknowledged interrupt request at priority 12 >>IOP dio: Test I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTATSTB >>IMBA csrw: Status is SIO OK | DIO OK | Power OK >>IMBA iobus: Returned data 160000 with signals (none) >>IOP dio: Start I/O order sent to device number 125 >>IMBA iobus: Received data 000000 with signals DSTARTIO >>IMBA csrw: Channel program started >>IMBA imbus: Channel 1 asserts CSRQ >>CPP serv: Program delay 1 service scheduled >>IMBA iobus: Returned data 000000 with signals (none) >>CPP serv: Channel processor running >>IMBA imbus: Channel 1 received opcode I/O Read command SPOL1 register 0 data 000000 with signals ADO | DDO | PRI >>IMBA imbus: Channel 1 returned data 040000 with signals ADN | DDN | PRO >>CPP cmd: Channel processor servicing channel 1 >>CPP data: 00.000770 000004 absolute read >>CPP cmd: Channel processor executing SED2 >>CPP data: 00.000771 000001 absolute read >>CPP serv: Completion delay 1 service scheduled >>CPP serv: Channel processor idled >>CPP serv: IMBA completion service entered >>CPP data: 00.000774 100000 absolute write >>IOP dio: Reset Interrupt order sent to device number 88 >>IMBA iobus: Received data 000000 with signals DRESETINT >>IMBA iobus: Returned data 000000 with signals (none)